Verilog is a description language used in the field of semiconductor and electronic design. It is also used in analog and mixed-signal circuits. VHDL is a hardware description language used in electronic design automation and integrated circuits. If your business is working with Verilog / VHDL then you can use some freelancer help to ease the workload. Post your Verilog/VHDL job today to connect with such freelancers. Punësoni Verilog / VHDL Designers

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    15 punët e gjetura, me çmimin EUR

    Need to investigate the latches, flip-flops and the registers in VHDL laboratory work

    €63 (Avg Bid)
    €63 Oferta mesatare
    4 ofertat

    I want to hire a person who has an experience in solving problems related to verilog in VLSI design(small work though),has to be experienced in handy usage of software like xilinx/[identifikohuni për të parë adresën URL] for the problem and other info.

    €19 (Avg Bid)
    €19 Oferta mesatare
    5 ofertat

    digital Alarm clock. I need it for my final project. Please let me know if anyone can do it in 20$. Lowest bit will be rewarded.

    €89 (Avg Bid)
    €89 Oferta mesatare
    5 ofertat

    I need it for my final project. Please let me know if anyone can do it in 20$. Lowest bit will be rewarded.

    €24 (Avg Bid)
    €24 Oferta mesatare
    6 ofertat

    This Project is to investigate latches, flip-flops and registers. VHDL -- Quartus Prime Lite 18.1 Quartus. design simple processor

    €19 (Avg Bid)
    €19 Oferta mesatare
    2 ofertat

    This Project is to investigate latches, flip-flops and registers. VHDL -- Quartus Prime Lite 18.1 Quartus.

    €19 (Avg Bid)
    €19 Oferta mesatare
    1 ofertat

    The first installment of the project dealt with the capability to simulate the actions of four very simple gate types, an INV gate, an AND gate, an OR gate and an XOR (exclusive or) gate. The second installment extended that capability by describing the simple logic gates using Verilog, but the Verilog was restricted to descriptions of circuits which only contained a single gate. For the third ins...

    €44 (Avg Bid)
    €44 Oferta mesatare
    14 ofertat
    OFDM Waveform Development 5 ditë left
    VERIFIKUAR

    Need someone to develop OFDM waveform on AD9361 or any other transceiver and FPGA.

    €983 (Avg Bid)
    €983 Oferta mesatare
    8 ofertat

    hello, please if you can comment out the verilog code and the steps done, so we know how to explain it. also, i need this project to be done in exactly one week from today. thank you

    €49 (Avg Bid)
    €49 Oferta mesatare
    6 ofertat
    HEVC implementation 3 ditë left
    VERIFIKUAR

    anyone having knowledge on HEVC can reach out to me

    €12 / hr (Avg Bid)
    €12 / hr Oferta mesatare
    3 ofertat
    Design a circuit in Xilinx 3 ditë left
    VERIFIKUAR

    Design a circuit in Xilinx that takes these inputs and outputs according to the table below

    €26 (Avg Bid)
    €26 Oferta mesatare
    8 ofertat

    Need someone know well vhdl ............................. ............................. .............................

    €30 (Avg Bid)
    €30 Oferta mesatare
    13 ofertat
    linux build for red pitaya 23 orё left
    VERIFIKUAR

    https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18841738/Getting+Started [identifikohuni për të parë adresën URL] Linux build and application development for simple LED blink project.

    €204 (Avg Bid)
    €204 Oferta mesatare
    3 ofertat

    I have an application that I want to run on, Field programmable array gates (FPGAs) architecture using the parallel programming language OpenCL. The software and the FPGAs board I am using are from Xilinx company. The OpenCL compiler is Xilinx SDSoC OpneCL. I need help with optimising the code using the OpenCL and FPGAs methods to run the code faster. I have already tried that but I am not happy ...

    €180 (Avg Bid)
    €180 Oferta mesatare
    7 ofertat
    Trophy icon VHDL Bitcoin Në përfundim left

    I would like to perform a hash of a simple 'abc' message, using the bitcoin hashing algorithm (proof of work) using the vhdl coding on modelsim. And also having the design to implement it on FPGA

    €205 (Avg Bid)
    €205
    1 kandidaturat