Verilog / VHDL Punë dhe Konkurse

Verilog is a description language used in the field of semiconductor and electronic design. It is also used in analog and mixed-signal circuits. VHDL is a hardware description language used in electronic design automation and integrated circuits. If your business is working with Verilog / VHDL then you can use some freelancer help to ease the workload. Post your Verilog/VHDL job today to connect with such freelancers.
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Projekt/Konkurs Përshkrimi Oferta/Propozime Aftësi Filloi Përfundon Çmimi (EUR)
Cloudsim project I want someone to work on programming part in cloudsim that includes migration, Placement, scheduling and power consumption. 2 Programim C, Java, Verilog / VHDL, Arkitekturë Softuerësh, Programim në gjuhën C++ Oct 18, 2017 Sot6d 22o €52
Verilog programming - 18/10/2017 00:34 EDT Simple verilog programming project. Create an ALU with full [url u hoq, identifikohuni për t'a parë] is desired is a Verilog system that can operate as a calculator with a set of logic gates attached. Other details provided later. 5 Verilog / VHDL Oct 18, 2017 Sot6d 21o €63
Verification Of Motion Estimator Using UVM Verification Of Motion Estimator Using UVM(Universal Verification Methodology) 1 Verilog / VHDL, Inxhinieri Elektrike, Very-large-scale integration (VLSI) Oct 17, 2017 Sot6d 19o €189
Verilog programming Simple verilog programming project. Create an ALU with full [url u hoq, identifikohuni për t'a parë] is desired is a Verilog system that can operate as a calculator with a set of logic gates attached. Other details provided later. 2 Verilog / VHDL Oct 17, 2017 Sot6d 17o €105
ASIC Design in Verilog This project is related to Computational Neural Networks 3 Matlab dhe Mathematica, Verilog / VHDL, Neural Networks Oct 17, 2017 Sot6d 12o €59
VHDL Radio clock everything is going to be explained on the pdf 8 Elektronikë, Verilog / VHDL, Mikrokontrollor, Inxhinieri Elektrike, FPGA Oct 17, 2017 Sot6d 11o €37
Design of audio visualiser using DE2-115 Altera board I want to implement an audio visualizer on the screen of the voice spoken through the mic or played using SD card. 4 Verilog / VHDL Oct 17, 2017 Sot6d 9o €199
Matlab power system Simulation using Simulink -- 2 - 17/10/2017 07:15 EDT My project is about the microgrid protection. I need to simulate a simple power network system (Figure 6 in the attachment) using Simulink, For the inverter I need to make some controller that can control when the microgrid is in grid mode or islanded mode (Figure 3-5 in the attachment). It is best if I can get the result same or similar with the one that in the journa 12 Inxhinieri, Elektronikë, Matlab dhe Mathematica, Verilog / VHDL, Inxhinieri Elektrike Oct 17, 2017 Sot6d 3o €108
Matlab power system Simulation using Simulink My project is about the microgrid protection. I need to simulate a simple power network system (Figure 6 in the attachment) using Simulink, For the inverter I need to make some controller that can control when the microgrid is in grid mode or islanded mode (Figure 3-5 in the attachment). It is best if I can get the result same or similar with the one that in the journa 10 Inxhinieri, Elektronikë, Matlab dhe Mathematica, Verilog / VHDL, Inxhinieri Elektrike Oct 17, 2017 Sot6d 2o €126
Elektronikë, Verilog / VHDL, Mikrokontrollor, Inxhinieri Elektrike, LabVIEW Oct 16, 2017 Oct 16, 20175d 20o
netlist construction in EE using C++ refactor the sample code by using the c++ 8 Programim C, Verilog / VHDL, Programim në gjuhën C#, Inxhinieri Elektrike, Programim në gjuhën C++ Oct 16, 2017 Oct 16, 20175d 8o €114
project for Ahmed M -- 2 - 16/10/2017 12:09 EDT I believe you must do this project. 2 Verilog / VHDL Oct 16, 2017 Oct 16, 20175d 8o €108
project for Ahmed M I believe you must do this project. 1 Verilog / VHDL Oct 16, 2017 Oct 16, 20175d 8o €132
verilog project want verilog code on fpga i want soon 2 Inxhinieri, Verilog / VHDL, Arkitekturë Softuerësh, LabVIEW, FPGA Oct 16, 2017 Oct 16, 20175d 7o €7
ASIC Designs and Development Hello. I am into a project that involves creating PCB / ASIC design with FPGA/CLPD. The specified ASIC Architecture as a product needs to be able calculate one or more algorithms connected through some type of data socket. Performance and power is important. I am interrested to get in touch with a board designer and vhdl developer that have knowledge both with electrical layouts and vhdl. ... 5 Inxhinieri, Elektronikë, Verilog / VHDL, Inxhinieri Elektrike, Faqosje PCB Oct 16, 2017 Oct 16, 20175d 1o €14
veriloghdl code for calculation area THis must implement on quartus( altera FPGA cyclone IV) 3 Programim C, Verilog / VHDL, Mikrokontrollor, Programim në gjuhën C++ , FPGA Oct 16, 2017 Oct 16, 20175d €60
making verlog hdl code calculataion area in black and white image on fpga ( cyclone IV) 7 Programim C, Verilog / VHDL, Mikrokontrollor, Inxhinieri Elektrike, Programim në gjuhën C++ Oct 16, 2017 Oct 16, 20174d 21o €105
VHDL Coursework help in VHDL codes ,, everything will be explained later 11 Inxhinieri, Elektronikë, Verilog / VHDL, Inxhinieri Elektrike Oct 15, 2017 Oct 15, 20174d 12o €47
fpga software I want to read programmes in FPGA chips 17 Programim C, Verilog / VHDL, Arkitekturë Softuerësh, FPGA Oct 15, 2017 Oct 15, 20174d 7o €351
creation of hardware module using verilog which will be able to communicate with the memory of the processor using Verilog which will be able to communicate with the memory of the processor 3 Verilog / VHDL Oct 14, 2017 Oct 14, 20173d 6o €54
simple verilog hdl code calculate each area in black and white image 10 Programim C, Inxhinieri, Verilog / VHDL, Mikrokontrollor, FPGA Oct 13, 2017 Oct 13, 20172d 19o €35
Simple Verilog Project Design a perception timer that measures the time for a user to respond to a request to complete a simple task. I'll send the rest details for part 3. 7 Inxhinieri, Matlab dhe Mathematica, Verilog / VHDL, Inxhinieri Elektrike, FPGA Oct 13, 2017 Oct 13, 20172d 12o €17
Color space conversions and FPGA's 3 pages report in two parts on: (i) fundamental information about FPGAs and their programming, and (ii) standard color spaces and formulas for converting those color spaces into other ones. (Plagarism free) finished in 3 days maximum. 8 Inxhinieri, Verilog / VHDL, Inxhinieri Elektrike, FPGA Oct 13, 2017 Oct 13, 20172d 2o €59
Build software Looking for expert in FPGA and verilog 18 Programim C, Verilog / VHDL, Arkitekturë Softuerësh, Programim në gjuhën C++ , FPGA Oct 12, 2017 Oct 12, 201721o 4m €408
Statcom in simulink Power electronics expert -- 3 Statcom in simulink Power electronics expert needed 12 Elektronikë, Matlab dhe Mathematica, Verilog / VHDL, Inxhinieri Elektrike, FPGA Oct 11, 2017 Oct 11, 20172o 55m €221
Statcom in simulink Power electronics expert -- 2 Statcom in simulink Power electronics expert needed 9 Elektronikë, Matlab dhe Mathematica, Verilog / VHDL, Inxhinieri Elektrike, FPGA Oct 11, 2017 Oct 11, 2017Në përfundim €140
Want to develop robotic program and test the same with simulation to check feasibility of and automation idea Existing : Manual labours are lifting filled 25 kg bags from stack of machine palletised load (40 bags per wooden pallet, and loading into trucks, containers. Automation solution : Using three axis gantry robot, vacuum lifting end tool and smart programming to create fully automatic truck loading system. All above only on simulation, 3d models to check feasibility of solutions and then to us... 5 Matlab dhe Mathematica, Verilog / VHDL, Arkitekturë Softuerësh, Zhvillim Softuerësh, Programim Oct 11, 2017 Oct 11, 2017Ka përfunduar €3978
Convert a code from Aptech Gauss language into Matlab with Parallel processing.....!!!! I have a code written in Aptech Gauss program that I want to convert into Matlab and I want the code to run under CUDA power in Matlab. 5 Matlab dhe Mathematica, Verilog / VHDL, Arkitekturë Softuerësh, CUDA, Zhvillim Softuerësh Oct 11, 2017 Oct 11, 2017Ka përfunduar €103
VLSI PROJECTS FIND THE ATTACHED IEEE [url u hoq, identifikohuni për t'a parë] REQUIREMENTS 4 Verilog / VHDL, FPGA, Very-large-scale integration (VLSI) Oct 11, 2017 Oct 11, 2017Ka përfunduar €73
Statcom in simulink Power electronics expert Statcom in simulink Power electronics expert needed 9 Elektronikë, Matlab dhe Mathematica, Verilog / VHDL, FPGA Oct 11, 2017 Oct 11, 2017Ka përfunduar €97
Convert a code from Aptech Gauss language into Matlab with Parallel processing. I have a code written in Aptech Gauss program that I want to convert into Matlab and I want the code to run under CUDA power in Matlab. 3 Matlab dhe Mathematica, Verilog / VHDL, Arkitekturë Softuerësh, CUDA, Zhvillim Softuerësh Oct 10, 2017 Oct 10, 2017Ka përfunduar €130
Develop, Test and Implement it in software environment and simulate the circuit functionality - open to bidding We need to develop a digital multiplier circuit and we need to test the circuit design, Implement it in software environment and simulate the circuit functionality. This is going to be part of a bigger project (ARM IP Core, DSP CPU) and we may need to compare the circuit functionality with some other recommended multiplier in terms of speed and foot print. 7 Elektronikë, Verilog / VHDL, Inxhinieri Elektrike, Projektim dixhital, Projektim qarku Oct 10, 2017 Oct 10, 2017Ka përfunduar €91
Prelab Write VHDL code 7 Verilog / VHDL Oct 10, 2017 Oct 10, 2017Ka përfunduar €23
dimensionality reduction using PCA we will consider use of PCA for simple dimensionality reduction, i.e., determining the signal subspace when there are more observations than the underlying latent variables—signals. The main assumption here is that both the noise and signals are independent and identically distributed Gaussians, however the the signals are correlated among themselves while the noise components are not, ... 14 Matlab dhe Mathematica, Verilog / VHDL, Analiza e elementëve të fundëm, CUDA, FPGA Oct 10, 2017 Oct 10, 2017Ka përfunduar €347
ZYNQ c/ verilog project(s) There is a Zynq C/ Verilog project involving BRAM and data structures , to be done. We will start with a 50 usd small project, on successful completion we will move into larger budget projects( a few hundred USD ones) .PM me to talk the details. 11 Programim C, Verilog / VHDL Oct 10, 2017 Oct 10, 2017Ka përfunduar €70
Altera DE115 - Audio signal processing Record voice , Add and Remove Noise and play back recording. Design and implement the verilog code on an Altera DE2-115 Development Board. Available Hardware Microphones, Speakers 9 Verilog / VHDL, Mikrokontrollor, Embedded Software, Programim në gjuhën Assembly, FPGA Oct 10, 2017 Oct 10, 2017Ka përfunduar €192
Audio Signal Processing AIM - Record Audio , Add and Remove Noise and play back audio. To design and implement the Embedded System centred on an Altera DE2-115 Development Board. The project should be based on a Verilog HDL implementation. Available Hardware In addition to the DE2-115 board, the following hardware devices are available. If you wish to do a project requiring hardware support but don’t see the... 7 Verilog / VHDL, Mikrokontrollor, Inxhinieri Elektrike, Embedded Software, FPGA Oct 10, 2017 Oct 10, 2017Ka përfunduar €432
Sequence Diagram There is a service class called PurchaseOrder that is called when a customer makes a purchase. It has a public method purchase(Account, Order). It does the following. a. Call [url u hoq, identifikohuni për t'a parë]() b. Call [url u hoq, identifikohuni për t'a parë](Account) c. Call [url u hoq, identifikohuni për t'a parë]() d. [url u hoq, identifik... 6 Verilog / VHDL, Arkitekturë Softuerësh, PLC & SCADA, Analiza e elementëve të fundëm, Vizatim teknik Oct 10, 2017 Oct 10, 2017Ka përfunduar €31
Matlab Program for Harmonics Analysis for a sampled data (Data in excel format) Need a Matlab program to perform Harmonics Analysis for a sampled data (data in Excel format). Matlab Codes must structured to read data from Excel file. Please find the attached Excel file [url u hoq, identifikohuni për t'a parë] 22 Excel, Matlab dhe Mathematica, Verilog / VHDL, Arkitekturë Softuerësh, Zhvillim Softuerësh Oct 7, 2017 Oct 7, 2017Ka përfunduar €18
UML/MARTE modeling I want to build an interface(which consists of rules) to transform any MML model to a UML-MARTE model using AGG(algebraic graph transformation). 1 Verilog / VHDL, Projektim në gjuhën UML, Analiza e elementëve të fundëm, SAS, CATIA Oct 7, 2017 Oct 7, 2017Ka përfunduar €499
Stack Automata C++ All requirements in PDF. A Stack Automata for validate a string 7 Verilog / VHDL, Analiza e elementëve të fundëm, Prolog, Programim në gjuhën C++ , Haskell Oct 7, 2017 Oct 7, 2017Ka përfunduar €40
matlab report making 10 pages minimum hi discussion via chat no front milestone need it in 12 hrs 10 mages maximum paper should be in IEEE formats no plagiarism is there.. please give a good quote 10 Matlab dhe Mathematica, Verilog / VHDL, LaTeX, Matematikë, Fizikë Oct 7, 2017 Oct 7, 2017Ka përfunduar €41
Matlab Write a Function for Forward Kinematics of the RPR Robot Input Format are the joint angles in radian, as shown in the figure is the extension of the prismatic joint in inches, as shown in the figure Output Format R is a 3x3 rotation matrix representing (Note: where represents a point in frame x) pos is a 4x3 matrix where each row contains the x,y,z coordinates represented as [x y z] in matrix form. Each row is the x,y,z coordinates of a point... 16 Matlab dhe Mathematica, Verilog / VHDL, Arkitekturë Softuerësh, Analiza e elementëve të fundëm, Zhvillim Softuerësh Oct 7, 2017 Oct 7, 2017Ka përfunduar €32
String compare algorithm need an algorithm that would compare two long strings delimited by | 3 Matlab dhe Mathematica, Verilog / VHDL, Algoritëm, CUDA, Mësim automatik (Machine Learning) Oct 7, 2017 Oct 7, 2017Ka përfunduar €1666
Cryptoanalysis - Cryptograpgy - C programming I am looking for someone to write me a code in c that will test the cryptographic strength of the passwords. I can share more specific instructions and dummy passwords. I need a simple program. 9 Programim C, Verilog / VHDL, Arkitekturë Softuerësh, Prolog, Programim në gjuhën C++ Oct 6, 2017 Oct 6, 2017Ka përfunduar €59
MSF and DCF receiver everything will me explained later 5 Inxhinieri, Elektronikë, Verilog / VHDL, Inxhinieri Elektrike, Analizë Binare Oct 6, 2017 Oct 6, 2017Ka përfunduar €39
Embedded Control System Design It is a project on Embedded Control System Design. I will give the details later. 12 Programim C, Verilog / VHDL Oct 6, 2017 Oct 6, 2017Ka përfunduar €37
ABAQUS Model (CFRP Beam) I need to make the results of this ABAQUS model converge with the experimental data curve (shown in the Excel sheet: Load vs Deflection). The current results shows a much higher yield and peak loading compared to the experimental data. The model files are attached to this project. 13 Verilog / VHDL, Analiza e elementëve të fundëm, Grafikë kompjuterike, Inxhinieri industriale, CATIA Oct 5, 2017 Oct 5, 2017Ka përfunduar €161
Simulation profile need a private tutor for ANSYS-Fluent and ICEM-CFD 8 Matlab dhe Mathematica, Verilog / VHDL, Analiza e elementëve të fundëm, FPGA, CATIA Oct 5, 2017 Oct 5, 2017Ka përfunduar €137
VHDL circuits project have few questions on digital circuits that I need help with. will provide more details of interested 23 Verilog / VHDL, Projektim qarku, Programim Oct 4, 2017 Oct 4, 2017Ka përfunduar €65
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