Looking for assistance with an LT spice simulation for designing a double stage mostfet amplifier.
The objective of this assignment is to design, simulate and analyse a low power multi-stage operational amplifier to drive a capacitive load based on appropriate TSMC 0.18 μm CMOS process. The amplifier has to be designed for maximum gain-bandwidth but at a limited power budget, power supplies and load capacitance. The amplifier must achieve the following specifications:
1. AC input signal = 5 mVpeak
2. Power supply = 1.8 V
3. Total power < 90 μW
4. Gain ~ 35 dB
5. Cut off frequency ~ 200 kHz
6. Phase margin of at least 70 ̊
7. The output is able to drive a 1 pF capacitive load and 2 kΩ resistive load.
*Experience with multistage amplifiers. Pre/Power Amps (Class A,B,C,D). Mosfet/BJT*
I have a diverse experience when it comes to circuit design, electronics projects, as i have a profound engineering background. Kindly review my PORTFOLIO, i can get the job done thanks!
$55 USD në 1 ditë
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3 freelancers are bidding on average $166 USD for this job
I can do this project work i m in teaching field being a professor in reputed university in India
more than 20 years of experience on teaching and research papers solutions in addition that have knowledge on Matlab & Simulink , python COMSOL VHDL Verilog Spice software programming