Verilog, testbench, modelism
$10-30 USD
Paguhet në dorëzim
Verilog Simulation and Testbench Modification Project
I am looking for a freelancer who can assist me with a Verilog simulation project. Specifically, I need someone who can modify an existing Verilog code to create a basic level testbench.
I have two codes: Clock divider, 7segemnt, and I need to apply them
Required Skills and Experience:
- Strong proficiency in Verilog programming language
- Experience with Verilog simulation and testbench design
- Familiarity with ModelSim tool or equivalent
- Ability to communicate effectively and work collaboratively
If you have the necessary skills and experience, please apply for this project.
ID Projekti: #36605696
Rreth projektit
Është zgjedhur fitues:
Dear sir I have more than 10 years experience in digital design using verilog please check my profile also please message me so that we can discuss
Hello, I am VLSI Verification Engineer by Profession with 3 year of experience in Design and Test bench development with VHDL, Verilog, systemVerilog and UVM. Also I can help you how to use MODELSIM for design and V Më shumë