Verilog on a weekend :)

Hi, I have a couple of Verilog questions and would be happy to pay to pick someones brain! Attached is a simple HLS program that I synthesized to Verilog. I have some experience writing very basic Verilog programs, but some of the stuff would need an explanation. Attached is the Verilog project. And below in the text you will find the original HLS snippet. Ideally we would walk through the code an load the Verilog into Vivado and play a bit around with it for 2-3 hours while I ask a couple of questions. (1) CORDIC method is it applied here? (2) How does the entire program work? Honest question. (3) Why is there so much paramter overhead etc? (4) How would you simplify the application in Verilog? Requirements === (1) Happy to grab a Zoom or phone call (asked support seems to be okay) (2) Experience with Verilog HLS Code === """" void mul(float *a, float *b, float *c, float *out) { #pragma HLS interface axis port=a #pragma HLS interface axis port=b #pragma HLS interface axis port=c #pragma HLS interface axis port=out #pragma HLS pipeline float temp = *a * cosf(*b); *out = temp * *c; } """"